What Is a JTAG Emulator?
A JTAG emulator is a type of on-chip emulator used for debugging during CPU software development.
In contrast to an in-circuit emulator (ICE), which emulates the operation of a CPU by replacing the CPU on the board with a probe. A JTAG emulator allows debugging without removing the CPU from the board, but with the CPU still mounted.
This has the advantage of enabling evaluation under the same electrical characteristics as the product board, thereby contributing to early commercialization.
Applications of JTAG Emulators
JTAG is an industry standard for testing LSIs and boards. Based on this technical standard, CPU manufacturers design test access ports (TAPs) and conduct boundary scan tests (Boundary Scan Test).
As a result, the specifications of JTAG emulators differ from one CPU manufacturer to another. Since specifications that differ from one manufacturer to another cannot be called JTAG, an interface standard has been established based on the original specifications as JTAG compliance, and JTAG emulators are made based on this standard.
Principle of JTAG Emulators
The JTAG standard was standardized in 1990 as IEEE 1149.1. The reason behind this is that as CPUs and LSIs became more powerful and sophisticated, the pitch between pins became narrower and narrower, making it difficult to debug and test by applying test probes directly to the pins of CPUs and LSIs.
To solve this problem, a boundary scan method was devised to analyze the state of internal circuits by connecting circuits inside the chip in a dependent manner and sequentially reading out the state of the circuits.
This method allows us to check the internal state of the CPU or LSI without having to put a test probe on each pin of the CPU or LSI.
The JTAG standard was originally invented as a method for testing CPUs and LSIs, and was later used as a debugging method in CPU software development.
JTAG has five signal pins: TCK (clock), TDI (data input), TDO (data output), TMS (state control), and TRST, but the technical standards do not define the electrical characteristics of these signals. They are individually specified by the manufacturer.
The JTAG emulator can be used for CPU debugging, board inspection, communication between the internal circuitry of the IC and the host PC, and data writing to FPGAs.
Debugging With a JTAG Emulator
This section introduces the methods used to check the operation of the designed programming, identify defects, and improve performance.
Step Execution
This is the basic, and most commonly used debugging method. To perform step execution, it is necessary to stop the running program once. The method of stopping the program includes setting conditions called breakpoints and using the forced break function. Once the program is stopped, you can check the status of memory, registers, and variables while executing the source code line by line or function, or method by method.
Real-Time Tracing
This method is used for debugging when unexpected conditions occur. Even if branching conditions are thoroughly considered when designing a program, unexpected failures often occur when the program is combined with hardware or linked with other systems. In step execution, it is not possible to analyze failures caused by unknown conditions. Therefore, the program execution history, data access address and type (read/write), and interrupt status are stored in trace memory for failure analysis.
Time Measurement
The maximum, minimum, and average execution times (between two points from start to end) of a specified function unit module can be measured. It is also possible to measure the relationship between the called function (child function) and the calling function (parent function), as well as the frequency of calls. By improving the variation of execution time and reviewing the structure of functions, you can improve the performance of your system.
Programming With a JTAG Emulator
Data can be written directly to the FPGA or to the configuration memory via the FPGA. The configuration memory, on the other hand, is written to the FPGA’s volatile memory (RAM). On the other hand, configuration memory is nonvolatile memory (ROM), so the program is never lost once it is written.
Choose the writing method that best suits the reduction in the number of connectors and the stage of product development (during design or mass production).