What Is a CPLD?
A Complex Programmable Logic Device (CPLD) is a rewritable logic device with a relatively complex circuit structure.
CPLDs have made the development of products easier and less expensive than ever before.
Uses of CPLDs
CPLDs are widely used in the control boards of various consumer and industrial products, such as:
- Digital cameras and multifunction devices.
- Smartphones.
- In-vehicle controls and car navigation systems.
- Game consoles.
CPLDs are used in control circuits, particularly for the management of power circuits. They are often responsible for managing the order in which power is applied to circuits, voltage selection circuits, and other functions.
Principle of CPLDs
A CPLD consists of a block in which multiple programmable logic circuits are integrated and a wiring area that connects the different blocks. The block consists of three macrocells with AND-OR gate structures, a D-type flip-flop to hold one bit of information as either 0 or 1, and I/O pins for input and output.
The macrocell inputs digital signals from the Input pin and outputs signals to the Output pin with user-programmed logic circuitry. Internal primary data is stored in flip-flops.
The Routing Area is the connection between blocks and output data through one or more blocks.
Other Information about CPLDs
1. Differences between CPLDs and FPGAs
Field-Programmable Gate Arrays (FPGAs) are similar to CPLDs in that they use volatile memory, which means that circuit data is lost when power is removed.
CPLDs, on the other hand, use nonvolatile memory, such as EEPROM or flash memory, which retain circuit data. There is also a difference in scale.
FPGAs have tens of thousands of gates, while CPLDs have only a few thousand. Therefore, CPLDs are used to provide design data to FPGAs when power is turned on, while FPGAs are used to perform large-scale logic circuitry.
Additionally, latency varies depending on where the logic blocks are located, making it difficult for the FPGA to predict. In contrast, latency is easier for CPLDs to predict because the number of macrocells to be routed through them is fixed.
2. History of CPLDs
CPLDs were developed to replace TTL and CMOS logic devices about 30 years ago. At that time, circuits were constructed by combining general-purpose logic ICs with only NOT and AND functions.
The 7400 series from Texas Instruments (TI) is well known, but it is said that engineers at that time had to memorize hundreds of devices. The problem was that as circuits became more complex, dozens to hundreds of general-purpose logic ICs were required, resulting in huge board sizes.
As transistor miniaturization progressed, it became possible to realize thousands or tens of thousands of general-purpose logic ICs in a few LSIs, which accelerated the development of CPLDs.
3. The Process of Developing CPLDs
The development process for CPLD design is categorized into the following steps: logic design, logic synthesis, place and route, timing verification, and programming.
- Logic Design
Circuit design, also known as RTL design, is performed using hardware description languages such as Verilog and VHDL. - Logic Synthesis
Converts a circuit expressed in a hardware description language into a netlist that can be implemented in a CPLD. The circuit description is interpreted and converted into logic expressions such as NOT and AND. At this point, optimization is also performed to improve the operating speed of the circuit and reduce the chip area. - Place and Route
This determines how the contents of the netlist are arranged inside the CPLD. The time it takes for the outputs of the combined circuitry to stabilize is calculated, and the output timing between signals is adjusted to mitigate variability. - Timing Verification
Define delay times for elements inside CPLDs and perform simulations. - Programming
Based on the final design, data generated from development tools is fed into the CPLD.